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Old 24-04-2011, 01:33 AM   #1
hoangbt1803
Nhập môn đệ tử
 
Tham gia ngày: May 2009
Bài gửi: 5
:
Điều khiển kết nối mạng qua W5100 bằng PIC18F2525
Chào các bạn. Mình đang làm đồ án. Đồ án của mình như sau: lấy tin RSS bằng IC W5100 thông qua RJ45, thông tin lấy về (tin vắn tắt) hiển thị lên 8 led matrix 8*8. mình có đoạn code thiết lập các thanh ghi của W5100 bằng PÍC8F2525, điều khiển để thiết lập kêt nối mạng.
đây là sche giao tiếp W5100 vs PÍC8F2525

W5100.c
Trích:
#include "p18f2525.h"
#include "main.h"
#include "w5100.h"

// functions
void wiz_init()
{
unsigned char temp8;

LATA |= (1 << WIZ_RST);
wiz_write_reg(MR_RST, MR);

// set gateway ip, subnet mask, source mac and source ip
for(temp8=0; temp8<4; temp8++) //
wiz_write_reg(0x00, GAR0+temp8);
for(temp8=0; temp8<4; temp8++)
wiz_write_reg(0x00, SUBR0+temp8);
for(temp8=0; temp8<6; temp8++)
wiz_write_reg(source_mac[temp8], SHAR0+temp8);
for(temp8=0; temp8<4; temp8++)
wiz_write_reg(0x00, SIPR0+temp8);

// disable wiz interrupts
wiz_write_reg(0x00, IMR);
}

void wiz_tcp_open(unsigned char socket, unsigned int srcport)
{
// open socket for TCP
do
{
//wiz_write_reg(Sn_CR_CLOSE, Sn_CR(0));
wiz_write_reg(Sn_MR_CLOSE, Sn_MR(socket));
wiz_write_reg(Sn_MR_TCP, Sn_MR(socket));
wiz_write_reg((unsigned char)(srcport >> 8), Sn_PORT0(socket));
wiz_write_reg((unsigned char)(srcport & 0x00FF), Sn_PORT0(socket)+1);
wiz_write_reg(Sn_CR_OPEN, Sn_CR(socket));
} while(wiz_read_reg(Sn_SR(socket)) != SOCK_INIT);
}

unsigned char wiz_tcp_connect(unsigned char socket, unsigned char *ip, unsigned int dstport)
{
unsigned char temp8;

// set destination ip/port and connect
for(temp8=0; temp8<4; temp8++)
wiz_write_reg(*(ip+temp8), Sn_DIPR0(socket)+temp8);

wiz_write_reg((unsigned char)(dstport >> 8), Sn_DPORT0(socket));
wiz_write_reg((unsigned char)(dstport & 0x00FF), Sn_DPORT0(socket)+1);
wiz_write_reg(Sn_CR_CONNECT, Sn_CR(socket));

// check if connection established
while(wiz_read_reg(Sn_SR(socket)) != SOCK_ESTABLISHED)
{
temp8 = wiz_read_reg(Sn_SR(socket));
if((temp8 == SOCK_CLOSED) || (temp8 == SOCK_CLOSE_WAIT))
return 0;
}
return 1;
}

void wiz_udp_open(unsigned char socket, unsigned int srcport)
{
// open socket for UDP
do
{
wiz_write_reg(Sn_MR_UDP, Sn_MR(socket));
wiz_write_reg((unsigned char)(srcport >> 8), Sn_PORT0(socket));
wiz_write_reg((unsigned char)(srcport & 0x00FF), Sn_PORT0(socket)+1);
wiz_write_reg(Sn_CR_OPEN, Sn_CR(socket));
if(wiz_read_reg(Sn_SR(socket)) != SOCK_UDP)
wiz_write_reg(Sn_MR_CLOSE, Sn_MR(socket));
} while(wiz_read_reg(Sn_SR(socket)) != SOCK_UDP);
}

unsigned int rd_txbuf_addr(unsigned char socket)
{
unsigned int tx_offset;

tx_offset = ((unsigned int)wiz_read_reg(Sn_TX_WR0(socket))) << 8;
tx_offset |= wiz_read_reg(Sn_TX_WR0(socket)+1);

if(socket==0)
{
tx_offset &= gS0_TX_MASK;
return (gS0_TX_BASE + tx_offset);
}
else if(socket==1)
{
tx_offset &= gS1_TX_MASK;
return (gS1_TX_BASE + tx_offset);
}
else if(socket==2)
{
tx_offset &= gS2_TX_MASK;
return (gS2_TX_BASE + tx_offset);
}
else if(socket==3)
{
tx_offset &= gS3_TX_MASK;
return (gS3_TX_BASE + tx_offset);
}
}

unsigned int rd_rxbuf_addr(unsigned char socket)
{
unsigned int rx_offset;

rx_offset = ((unsigned int)wiz_read_reg(Sn_RX_RD0(socket))) << 8;
rx_offset |= wiz_read_reg(Sn_RX_RD0(socket)+1);

if(socket==0)
{
rx_offset &= gS0_RX_MASK;
return (gS0_RX_BASE + rx_offset);
}
else if(socket==1)
{
rx_offset &= gS1_RX_MASK;
return (gS1_RX_BASE + rx_offset);
}
else if(socket==2)
{
rx_offset &= gS2_RX_MASK;
return (gS2_RX_BASE + rx_offset);
}
else if(socket==3)
{
rx_offset &= gS3_RX_MASK;
return (gS3_RX_BASE + rx_offset);
}

}

void wr_txbuf_ptr(unsigned char socket, unsigned int txlen)
{
unsigned int tx_offset;

tx_offset = ((unsigned int)wiz_read_reg(Sn_TX_WR0(socket))) << 8;
tx_offset |= wiz_read_reg(Sn_TX_WR0(socket)+1);

tx_offset+=txlen;
wiz_write_reg((unsigned char)(tx_offset >> 8), Sn_TX_WR0(socket));
wiz_write_reg((unsigned char)(tx_offset & 0x00FF), Sn_TX_WR0(socket)+1);
wiz_write_reg(Sn_CR_SEND, Sn_CR(socket));
}

void wr_rxbuf_ptr(unsigned char socket, unsigned int rxlen)
{
unsigned int rx_offset;

rx_offset = ((unsigned int)wiz_read_reg(Sn_RX_RD0(socket))) << 8;
rx_offset |= wiz_read_reg(Sn_RX_RD0(socket)+1);

rx_offset+=rxlen;
wiz_write_reg((unsigned char)(rx_offset >> 8), Sn_RX_RD0(socket));
wiz_write_reg((unsigned char)(rx_offset & 0x00FF), Sn_RX_RD0(socket)+1);
wiz_write_reg(Sn_CR_RECV, Sn_CR(socket));
}

unsigned int get_txfree(unsigned char socket)
{
unsigned int freesize1, freesize2;

freesize1=0;
freesize2=1;

do
{
freesize1 = ((unsigned int)wiz_read_reg(Sn_TX_FSR0(socket))) << 8;
freesize1 |= wiz_read_reg(Sn_TX_FSR0(socket)+1);
if (freesize1 != 0)
{
freesize2 = ((unsigned int)wiz_read_reg(Sn_TX_FSR0(socket))) << 8;
freesize2 |= wiz_read_reg(Sn_TX_FSR0(socket)+1);
}
} while (freesize1 != freesize2);

return freesize2;
}

unsigned int get_rxfree(unsigned char socket)
{
unsigned int freesize1, freesize2;

freesize1=0;
freesize2=1;

do
{
freesize1 = ((unsigned int)wiz_read_reg(Sn_RX_RSR0(socket))) << 8;
freesize1 |= wiz_read_reg(Sn_RX_RSR0(socket)+1);
if (freesize1 != 0)
{
freesize2 = ((unsigned int)wiz_read_reg(Sn_RX_RSR0(socket))) << 8;
freesize2 |= wiz_read_reg(Sn_RX_RSR0(socket)+1);
}
} while (freesize1 != freesize2);

return freesize2;
}

unsigned int get_txfree_timeout(unsigned char socket)
{
unsigned int freesize1, freesize2, timeout;

timeout = 1000000; // timeout delay if no free size read
freesize1=0;
freesize2=1;

do
{
freesize1 = ((unsigned int)wiz_read_reg(Sn_TX_FSR0(socket))) << 8;
freesize1 |= wiz_read_reg(Sn_TX_FSR0(socket)+1);
if (freesize1 != 0)
{
freesize2 = ((unsigned int)wiz_read_reg(Sn_TX_FSR0(socket))) << 8;
freesize2 |= wiz_read_reg(Sn_TX_FSR0(socket)+1);
}
} while ((freesize1 != freesize2) && (--timeout>0));

if(timeout==0)
return 0;
else
return freesize2;
}

unsigned int get_rxfree_timeout(unsigned char socket)
{
unsigned int freesize1, freesize2, timeout;

timeout = 1000000; // timeout delay if no free size read
freesize1=0;
freesize2=1;

do
{
freesize1 = ((unsigned int)wiz_read_reg(Sn_RX_RSR0(socket))) << 8;
freesize1 |= wiz_read_reg(Sn_RX_RSR0(socket)+1);
if (freesize1 != 0)
{
freesize2 = ((unsigned int)wiz_read_reg(Sn_RX_RSR0(socket))) << 8;
freesize2 |= wiz_read_reg(Sn_RX_RSR0(socket)+1);
}
} while ((freesize1 != freesize2) && (--timeout>0));

if(timeout==0)
return 0;
else
return freesize2;
}

unsigned char wiz_read_reg(unsigned int address)
{
unsigned char loop, data;

LATA &= ~(1 << WIZ_CS | 1 << WIZ_SCLK | 1 << WIZ_MOSI);

// send 8-bit 'read' op-code
for(loop=0; loop<8; loop++)
{
if((0x0F << loop) & 0x80)
LATA |= (1 << WIZ_MOSI);
else
LATA &= ~(1 << WIZ_MOSI);

LATA |= (1 << WIZ_SCLK);
LATA &= ~(1 << WIZ_SCLK);
}

// send 16-bit address to be read
for(loop=0; loop<16; loop++)
{
if((address << loop) & 0x8000)
LATA |= (1 << WIZ_MOSI);
else
LATA &= ~(1 << WIZ_MOSI);

LATA |= (1 << WIZ_SCLK);
LATA &= ~(1 << WIZ_SCLK);
}

// read 8-bit data
for(loop=0; loop<8; loop++)
{
LATA |= (1 << WIZ_SCLK);

if(PORTA & (1 << WIZ_MISO))
data |= (1 << 0);
else
data &= ~(1 << 0);

if(loop < 7)
data <<= 1;

LATA &= ~(1 << WIZ_SCLK);
}

LATA |= (1 << WIZ_CS);

return data;
}

void wiz_write_reg(unsigned char data, unsigned int address)
{
unsigned char loop;

LATA &= ~(1 << WIZ_CS | 1 << WIZ_SCLK | 1 << WIZ_MOSI); // xoa cac bit 7,6 va 1 cua lata =0

// send 8-bit 'write' op-code
for(loop=0; loop<8; loop++)
{
if((0xF0 << loop) & 0x80)
LATA |= (1 << WIZ_MOSI); // set lata.7=1, giu nguyen cac bit con lai
else
LATA &= ~(1 << WIZ_MOSI); // set lata.7=0

LATA |= (1 << WIZ_SCLK); // set bit lata.6=1
LATA &= ~(1 << WIZ_SCLK); // set bit lata.6=0
}

// send 16-bit address to be written
for(loop=0; loop<16; loop++)
{
if((address << loop) & 0x8000)
LATA |= (1 << WIZ_MOSI); // set lata.7=1, giu nguyen cac bit con l?i
else
LATA &= ~(1 << WIZ_MOSI); // set lata.7=0,

LATA |= (1 << WIZ_SCLK); // set bit lata.6=1
LATA &= ~(1 << WIZ_SCLK); // set bit lata.6=1
}

// send 8-bit data to be written
for(loop=0; loop<8; loop++)
{
if((data << loop) & 0x80)
LATA |= (1 << WIZ_MOSI); // set lata.7=1, giu nguyen cac bit con lai
else
LATA &= ~(1 << WIZ_MOSI); // set lata.7=0

LATA |= (1 << WIZ_SCLK); // set lata.6=1
LATA &= ~(1 << WIZ_SCLK); // set lata.6=0
}

LATA |= (1 << WIZ_CS); // set lata.2=1
}
trong file W5100.c, hàm wiz_write_reg() và hàm wiz_read_reg() mình hiểu từng dòng lệnh của nó, hiểu nó truyền giá trị cho các thanh ghi bằng LAT A. nhưng tổng thể cách truyền như thế nào mình ko nghĩ ra. các bạn đọc giúp mình giải quyết khó khăn nhé.
W5100.h
Trích:
// function prototypes
void wiz_init(void);
void wiz_write_reg(unsigned char data, unsigned int address);
unsigned char wiz_read_reg(unsigned int address);
unsigned int rd_txbuf_addr(unsigned char socket);
unsigned int rd_rxbuf_addr(unsigned char socket);
void wr_txbuf_ptr(unsigned char socket, unsigned int txlen);
void wr_rxbuf_ptr(unsigned char socket, unsigned int rxlen);
unsigned int get_txfree(unsigned char socket);
unsigned int get_rxfree(unsigned char socket);
unsigned int get_txfree_timeout(unsigned char socket);
unsigned int get_rxfree_timeout(unsigned char socket);
void wiz_tcp_open(unsigned char socket, unsigned int srcport);
unsigned char wiz_tcp_connect(unsigned char socket, unsigned char *ip, unsigned int dstport);
void wiz_udp_open(unsigned char socket, unsigned int srcport);

// confiuration definitions
#define HTTP_SOCKET 0
#define HTTP_SRC_PORT 2913
#define HTTP_DST_PORT 80

#define DHCP_SOCKET 1
#define DHCP_SRC_PORT 68
#define DHCP_DST_PORT 67

#define DNS_SOCKET 2
#define DNS_SRC_PORT 3819
#define DNS_DST_PORT 53

// common registers
#define COMMON_BASE 0x0000
#define MR (COMMON_BASE + 0x0000)
#define GAR0 (COMMON_BASE + 0x0001)
#define SUBR0 (COMMON_BASE + 0x0005)
#define SHAR0 (COMMON_BASE + 0x0009)
#define SIPR0 (COMMON_BASE + 0x000F)
#define IR (COMMON_BASE + 0x0015)
#define IMR (COMMON_BASE + 0x0016)
#define RTR0 (COMMON_BASE + 0x0017)
#define RCR (COMMON_BASE + 0x0019)
#define RMSR (COMMON_BASE + 0x001A)
#define TMSR (COMMON_BASE + 0x001B)
#define PATR0 (COMMON_BASE + 0x001C)
#define PTIMER (COMMON_BASE + 0x0028)
#define PMAGIC (COMMON_BASE + 0x0029)
#define UIPR0 (COMMON_BASE + 0x002A)
#define UPORT0 (COMMON_BASE + 0x002E)

// socket registers
#define CH_BASE (COMMON_BASE + 0x0400)
#define CH_SIZE 0x0100
#define Sn_MR(ch) (CH_BASE + ch * CH_SIZE + 0x0000)
#define Sn_CR(ch) (CH_BASE + ch * CH_SIZE + 0x0001)
#define Sn_IR(ch) (CH_BASE + ch * CH_SIZE + 0x0002)
#define Sn_SR(ch) (CH_BASE + ch * CH_SIZE + 0x0003)
#define Sn_PORT0(ch) (CH_BASE + ch * CH_SIZE + 0x0004)
#define Sn_DHAR0(ch) (CH_BASE + ch * CH_SIZE + 0x0006)
#define Sn_DIPR0(ch) (CH_BASE + ch * CH_SIZE + 0x000C)
#define Sn_DPORT0(ch) (CH_BASE + ch * CH_SIZE + 0x0010)
#define Sn_MSSR0(ch) (CH_BASE + ch * CH_SIZE + 0x0012)
#define Sn_PROTO(ch) (CH_BASE + ch * CH_SIZE + 0x0014)
#define Sn_TOS(ch) (CH_BASE + ch * CH_SIZE + 0x0015)
#define Sn_TTL(ch) (CH_BASE + ch * CH_SIZE + 0x0016)
#define Sn_TX_FSR0(ch) (CH_BASE + ch * CH_SIZE + 0x0020)
#define Sn_TX_RD0(ch) (CH_BASE + ch * CH_SIZE + 0x0022)
#define Sn_TX_WR0(ch) (CH_BASE + ch * CH_SIZE + 0x0024)
#define Sn_RX_RSR0(ch) (CH_BASE + ch * CH_SIZE + 0x0026)
#define Sn_RX_RD0(ch) (CH_BASE + ch * CH_SIZE + 0x0028)
#define Sn_RX_WR0(ch) (CH_BASE + ch * CH_SIZE + 0x002A)

// register values
//// MODE register values
#define MR_RST 0x80 // reset
#define MR_PB 0x10 // ping block
#define MR_PPPOE 0x08 // enable pppoe
#define MR_LB 0x04 // little or big endian selector in indirect mode
#define MR_AI 0x02 // auto-increment in indirect mode
#define MR_IND 0x01 // enable indirect mode

//// IR register values
#define IR_CONFLICT 0x80 // check ip confict
#define IR_UNREACH 0x40 // get the destination unreachable message in UDP sending
#define IR_PPPoE 0x20 // get the PPPoE close message
#define IR_SOCK(ch) (0x01 << ch) // check socket interrupt

//// Sn_MR values
#define Sn_MR_CLOSE 0x00 // unused socket
#define Sn_MR_TCP 0x01 // TCP
#define Sn_MR_UDP 0x02 // UDP
#define Sn_MR_IPRAW 0x03 // IP LAYER RAW SOCK
#define Sn_MR_MACRAW 0x04 // MAC LAYER RAW SOCK
#define Sn_MR_PPPOE 0x05 // PPPoE
#define Sn_MR_ND 0x20 // No Delayed Ack(TCP) flag
#define Sn_MR_MULTI 0x80 // support multicating

//// Sn_CR values
#define Sn_CR_OPEN 0x01 // initialize or open socket
#define Sn_CR_LISTEN 0x02 // wait connection request in tcp mode(Server mode)
#define Sn_CR_CONNECT 0x04 // send connection request in tcp mode(Client mode)
#define Sn_CR_DISCON 0x08 // send closing reqeuset in tcp mode
#define Sn_CR_CLOSE 0x10 // close socket
#define Sn_CR_SEND 0x20 // updata txbuf pointer, send data
#define Sn_CR_SEND_MAC 0x21 // send data with MAC address, so without ARP process
#define Sn_CR_SEND_KEEP 0x22 // send keep alive message
#define Sn_CR_RECV 0x40 // update rxbuf pointer, recv data

//// Sn_IR values
#define Sn_IR_SEND_OK 0x10 // complete sending
#define Sn_IR_TIMEOUT 0x08 // assert timeout
#define Sn_IR_RECV 0x04 // receiving data
#define Sn_IR_DISCON 0x02 // closed socket
#define Sn_IR_CON 0x01 // established connection

//// Sn_SR values
#define SOCK_CLOSED 0x00 // closed
#define SOCK_INIT 0x13 // init state
#define SOCK_LISTEN 0x14 // listen state
#define SOCK_SYNSENT 0x15 // connection state
#define SOCK_SYNRECV 0x16 // connection state
#define SOCK_ESTABLISHED 0x17 // success to connect
#define SOCK_FIN_WAIT 0x18 // closing state
#define SOCK_CLOSING 0x1A // closing state
#define SOCK_TIME_WAIT 0x1B // closing state
#define SOCK_CLOSE_WAIT 0x1C // closing state
#define SOCK_LAST_ACK 0x1D // closing state
#define SOCK_UDP 0x22 // udp socket
#define SOCK_IPRAW 0x32 // ip raw mode socket
#define SOCK_MACRAW 0x42 // mac raw mode socket
#define SOCK_PPPOE 0x5F // pppoe socket

//// IP PROTOCOL
#define IPPROTO_IP 0 // Dummy for IP
#define IPPROTO_ICMP 1 // Control message protocol
#define IPPROTO_IGMP 2 // Internet group management protocol
#define IPPROTO_GGP 3 // Gateway^2 (deprecated)
#define IPPROTO_TCP 6 // TCP
#define IPPROTO_PUP 12 // PUP
#define IPPROTO_UDP 17 // UDP
#define IPPROTO_IDP 22 // XNS idp
#define IPPROTO_ND 77 // UNOFFICIAL net disk protocol
#define IPPROTO_RAW 255 // Raw IP packet

// socket memory definitions
#define chip_base_address 0x0000
#define RX_memory_base_address 0x6000
#define gS0_RX_BASE chip_base_address + RX_memory_base_address
#define gS0_RX_MASK 0x0800 - 1
#define gS1_RX_BASE gS0_RX_BASE + (gS0_RX_MASK + 1)
#define gS1_RX_MASK 0x0800 - 1
#define gS2_RX_BASE gS1_RX_BASE + (gS1_RX_MASK + 1)
#define gS2_RX_MASK 0x0800 - 1
#define gS3_RX_BASE gS2_RX_BASE + (gS2_RX_MASK + 1)
#define gS3_RX_MASK 0x0800 - 1
#define TX_memory_base_address 0x4000
#define gS0_TX_BASE chip_base_address + TX_memory_base_address
#define gS0_TX_MASK 0x0800 - 1
#define gS1_TX_BASE gS0_TX_BASE + (gS0_TX_MASK + 1)
#define gS1_TX_MASK 0x0800 - 1
#define gS2_TX_BASE gS1_TX_BASE + (gS1_TX_MASK + 1)
#define gS2_TX_MASK 0x0800 - 1
#define gS3_TX_BASE gS2_TX_BASE + (gS2_TX_MASK + 1)
#define gS3_TX_MASK 0x0800 - 1
file W5100.h chỉ là file định nghĩa các địa chỉ của các thanh ghi, và vùng nhớ dữ liệu transmit (TX) và receive (RX) trong W5100
main.h
Trích:
extern unsigned char source_ip[4];
extern unsigned char gateway_ip[4];
extern unsigned char source_mac[6];
extern unsigned char subnetmask[4];
extern unsigned char rss_ip[4];
extern unsigned char dns_ip[4];
extern unsigned char news[21][150];

extern unsigned char * news_ptr;

extern volatile unsigned char framebuffer[10][8];

void main(void);


// pins configs
//
// RA0: WIZ_RST
// RA1: WIZ_CS
// RA2: WIZ_MISO
// RA6: WIZ_SCLK
// RA7: WIZ_MOSI
//
// RB1: LED_CS7
// RB2: LED_CS5
// RB3: LED_CS6
// RB4: LED_CS8
// RB5: WZ_INT
//
// RC0: LED_CS4
// RC1: LED_CS1
// RC3: LED_SCK
// RC4: LED_MISO
// RC5: LED_MOSI
// RC6: LED_CS2
// RC7: LED_CS3

#define LED_CS1 1
#define LED_CS2 6
#define LED_CS3 7
#define LED_CS4 0
#define LED_CS5 2
#define LED_CS6 3
#define LED_CS7 1
#define LED_CS8 4
// RST : là chân reset, duoc noi voi chan RA0 cua PIC18F2525, nen dat WIZ_RST bang 0
// CS : là chân *SCS, duoc noi voi chan RA1 cua PIC18F2525, nen WIZ_CS dat bang 1
// Tuong tu voi WIZ_MISO, WIZ_SCLK, WIZ_MOSI
// Rieng WIZ_INT duoc noi vao chan RB5 cua

// dat nhu tren la de dich cac bit, cau hinh cac chan RA0,1,2,6,7,5
#define WIZ_RST 0
#define WIZ_CS 1
#define WIZ_MISO 2
#define WIZ_SCLK 6
#define WIZ_MOSI 7
#define WIZ_INT 5
hàm main.h là định nghĩa các chân RST, CS, MISO ... INT dùng để dịch bit, để điều khiển ngõ ra PORT A của PÍC8F2525.

Các bạn giúp mình giải quyết vấn đề này nhé. thanks all.
hoangbt1803 vẫn chưa có mặt trong diễn đàn   Trả Lời Với Trích Dẫn
 

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